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МЕТОД ПІДВИЩЕННЯ ЕФЕКТИВНОСТІ СИМЕТРИЧНОГО БЛОКОВОГО ШИФРУВАННЯ

THE METHOD OF INCREASING THE EFFICIENCY OF SYMMETRICAL BLOCK ENCRYPTION

Сторінки: 191-197. Номер: №4, 2022 (311)  
Автори:
ПАТЛАНЬ Д. В.
Черкаський державний технологічний університет
https://orcid.org/0000-0003-3773-1619
e-mail: d.v.patlan.fetr18@chdtu.edu.ua
ПАЛАГІНА О. А.
Черкаський державний технологічний університет
https://orcid.org/0000-0002-5395-5092
e-mail: palahina@ukr.net
ІВЧЕНКО О. В.
Черкаський державний технологічний університет
https://orcid.org/0000-0002-6716-1939
e-mail: sania_ivchenko@ukr.net
ПАЛАГІН В. В.
Черкаський державний технологічний університет
https://orcid.org/0000-0003-1903-6022
e-mail: palahin@ukr.net
Dana PATLAN, Elena PALAHINA, Oleksandr IVCHENKO, Volodymyr PALAHIN
Cherkassy State Technological University
DOI: https://www.doi.org/10.31891/2307-5732-2022-311-4-191-197

Анотація мовою оригіналу

В роботі показана модифікація алгоритму блокового симетричного шифрування AES (Advanced Encryption Standard). При практичній реалізації модифікованого алгоритму показана можливість об’єднання ряду математичних операцій, які мають схожий принцип опрацювання елементів, що дозволило скоротити час обробки даних при їх шифруванні та дешифруванні у порівнянні з відомою реалізацією. Крім того, в удосконаленій реалізації операція MixColumns використовує попередньо обчислені таблиці пошуку необхідного значення, що також сприяє підвищенню швидкодії перетворень, але за рахунок більшого обсягу пам’яті для розміру коду.
Ключові слова: блоковий шифр, симетричне кодування, об’єднання операцій обробки даних, оптимізація часу обробки даних.

Розширена анотація англійською  мовою

Ensuring data safety and security are relevant in any sphere of human activity, which is directly related to the implementation of modern and advanced symmetric and asymmetric algorithms and methods of cryptographic protection of information. One of the well-known and safe encryption algorithms, known as AES (Advanced Encryption Standard), which is endowed with the properties of ease of practical implementation and high reliability, has found its wide application for block symmetric data encryption. A feature of symmetric encryption is the processing of large amounts of information, the use of the same key for encryption and decryption, high reliability of data protection. This paper proposes to improve this algorithm to provide faster data processing. All modifications of the AES transformations do not reduce the high cryptographic strength of the cipher, and their principles are described in detail in the paper. This practical implementation of the optimized algorithm shows the possibility of combining a number of mathematical operations that have a similar principle of processing elements, which allowed to reduce the processing time. In addition, in the improved implementation the MixColumns operation uses pre-calculated lookup tables of the required value, which also helps to increase the speed of transformations but at the cost of more memory for the code size. A comparative analysis of the practical implementation of the standard and optimized AES cryptoalgorithms has been carried out, and numerical indicators of the processing time of test data have been obtained, which are presented in the form of tables. Graphs of the dependence of the encryption and decryption procedure execution time on the file size for the standard and optimized AES algorithms have been constructed. The results show a significant percentage of optimization – up to 50% for encryption and up to 75% for decryption of data.
Keywords: block cipher, symmetric coding, combining data processing operations, optimization of data processing time.

Література

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References

  1. FIPS PUB 197. Specification for the Advanced Encryption Standard (AES), 2001.
  2. Daoud L., Hussein F., Rafla N.. Optimization of Advanced Encryption Standard (AES) Using Vivado High Level Synthesis (HLS). EPiC Series in Computing. 2019. V.58, P.36-44.
  3. Soltani A., Sharifian S.. An ultra-high throughput and fully pipelined implementation of AES algorithm on FPGA. Microprocessors and Microsystems. V.39, No.7, P.480-493.
  4. Karthigaikumar P., Anitha Christy N., Siva Mangai N. M.. PSP CO2: an efficient hardware architecture for AES algorithm for high throughput. Wireless Personal Communications. 2015. V.85, No.1, P.305–323.
  5. Taufik M., Amin D. E., Saifuddin M. A.. Hardware implementation and optimization of advanced encryption standard (AES) algorithm based on CCSDS. AIP Conference Proceedings. V.2226, P.060004
  6. Liu Y., Xu Х., Su H.. AES Algorithm Optimization and FPGA Implementation. IOP Conf. Series: Earth and Environmental Science. V.267, No.4, P. 042070.
  7. S., Vaishnavi.M., Vinothini.M., Umadevi.V.. Optimization of aes algorithm using hardware and software. International Journal of Scientific & Engineering Research. 2015. V.6, No.4, P.965-971
  8. Li M., Gan J., Cheng S., Hu X.,Yu Y., Li J.. Design of Lightweight AES Algorithm Based on Masked Lookup Table. IEEE 7th International Conference on Computer Science and Network Technology (ICCSNT). 2019. P.437-441.
  9. James M., Kumar D. S.. An Optimized Parallel Mixcolumn and Subbytes design in Lightweight Advanced Encryption Standard. International Journal of Computational Engineering Research (IJCER). V.6, No.3, P. 25-28.
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  12. Khatri, R. Chhabra, N. Gupta, A. Khanna and D. Gupta, “Secure modified aes algorithm for static and mobile networks”, International Conference on Innovative Computing and Communications, pp. 389-399, 2020.
  13. Sadi Arman; Tanjila Rehnuma; Mahfuzur Rahman. Design and Implementation of a Modified AES Cryptography with Fast Key Generation Technique. 2020 IEEE International Women in Engineering (WIE) Conference on Electrical and Computer Engineering (WIECON-ECE), 26-27 December 2020, 191-195.
  14. Stallings W.. Cryptography and network security: principles and practice; vol. 6. Pearson Education; 2017.
  15. Rijndael MixColumns. URL: https://en.wikipedia.org/wiki/Rijndael_MixColumns
  16. Riyaldhi R., Kurniawan A.. Improvement of advanced encryption standard algorithm with shift row and S. box modification mapping in mix column. Procedia computer science. 2017. V.116, P.401-407.

Post Author: Горященко Сергій

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